Publisher: Institute of Electrical and Electronics Engineers (IEEE)
We present the structure of an analog integrated circuit design laboratory to instruct at both, senior undergraduate and entry graduate levels. The teaching material includes: a laboratory manual with analog circuit design theory, pre-laboratory exercises and circuit de... View more
1. Introduction: Review of the Cadence design system and of the UNIX. Basics of CAP and dc SIM.
2. Layout Design: LAY techniques: unit size transistors; common centroid and interdigitized structures; and dummy transistors.
3. MOS Device Characterization: KP, VT, λ and γ are extracted through SIM and MEA. The parametric (PAR) analysis is introduced.
4. Current Mirrors: Simple, cascode, feedback and low-voltage. Design constraints: Zin, Zout, compliance, accuracy and complexity. Analyses: dc, ac and PAR. Run LVS. ac analysis is introduced.
5. Inverting Amplifiers: Current Mirror Load, Digital CMOS, PMOS with self biased load and self biased CMOS. Design constraints: GBW, PM and AV0. The effects of power supply, source resistance and load capacitance are investigated. Analyses: dc and ac. PSM is introduced.
6. Differential Amplifiers: Simple and cascode current mirrors. Design constraints: ADM, ACM, CMRR, CMR and SR. Analyses: dc, ac and transient (TRAN). TRAN analysis is introduced.
7. Operational Transconductance Amplifiers (OTA): Symmetrical OTA. Design constraints: GM and SR. Analyses: dc, ac and TRAN. The static power (PW) dissipation is measured and reported.
8. Operational amplifiers (OP): Three stage OP. Design constraints: ADM, ACM, CMRR, PSRR, GBW, PM, Zout, SR and PW. Monte-Carlo analysis is introduced, the ac response is used to explore the effect of random variations on parameters.
9. Analog System: Continuous low pass filter. Macromodelling is introduced.