MOS voltage automatic tuning circuit

Research Japanese OPEN
李, 田茂 ; 中田, 辰則 ; 松本, 寛樹 (2004)
  • Publisher: 宮崎大学工学部
  • Journal: Memoirs of the Faculty of Engineering, Miyazaki University, volume 33, pages 153-156 (issn: 0540-4924)
  • Subject: Phase locked loop | MOSFET | automatic tuning circuit | voltage
    arxiv: Computer Science::Hardware Architecture | Computer Science::Emerging Technologies
    acm: Hardware_INTEGRATEDCIRCUITS | Hardware_LOGICDESIGN | Hardware_PERFORMANCEANDRELIABILITY

Abstract ###Automatic tuning circuit adjusts frequency performance to compensate for the process variation. Phase locked ###loop (PLL) is a suitable oscillator for the integrated circuit. It is a feedback system that compares the input ###phase with the output phase. It can make the output frequency equal to the input frequency. In this paper, PLL ###fomed of MOSFET's is presented.The presented circuit consists of XOR circuit, Low-pass filter and Relaxation ###Oscillator. On PSPICE simulation, it can lock on 450~550MHz.
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