
doi: 10.3390/chips3040017
FPGAs are popular in many fields but have yet to gain wide acceptance for accelerating HPC codes. A major cause is that whilst the growth of High-Level Synthesis (HLS), enabling the use of C or C++, has increased accessibility, without widespread algorithmic changes these tools only provide correct-by-construction rather than fast-by-construction programming. The fundamental issue is that HLS presents a Von Neumann-based execution model that is poorly suited to FPGAs, resulting in a significant disconnect between HLS’s language semantics and how experienced FPGA programmers structure dataflow algorithms to exploit hardware. We have developed the high-level language Lucent which builds on principles previously developed for programming general-purpose dataflow architectures. Using Lucent as a vehicle, in this paper we explore appropriate abstractions for developing application-specific dataflow machines on reconfigurable architectures. The result is an approach enabling fast-by-construction programming for FPGAs, delivering competitive performance against hand-optimised HLS codes whilst significantly enhancing programmer productivity.
programming models, Electronic computers. Computer science, FPGAs, QA75.5-76.95, high level synthesis, Electric apparatus and materials. Electric circuits. Electric networks, Lucent, TK452-454.4, dataflow
programming models, Electronic computers. Computer science, FPGAs, QA75.5-76.95, high level synthesis, Electric apparatus and materials. Electric circuits. Electric networks, Lucent, TK452-454.4, dataflow
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