
Low-density parity check (LDPC) codes have been extensively applied in mobile communication systems due to their excellent error correcting capabilities. However, their broad adoption has been hindered by the high complexity of the LDPC decoder. Although to date, dedicated hardware has been used to implement low latency LDPC decoders, recent advancements in the architecture of mobile processors have made it possible to develop software solutions. In this paper, we propose a multi-stream LDPC decoder designed for a mobile device. The proposed decoder uses graphics processing unit (GPU) of a mobile device to achieve efficient real-time decoding. The proposed solution is implemented on an NVIDIA Tegra board as a system on a chip (SoC), where our results indicate that we can control the load on the central processing units through the multi-stream structure.
6 pages, 7 figures, 2019 IEEE 8th Annual Computing and Communication Workshop and Conference (CCWC)
FOS: Computer and information sciences, GPU processing, Computer Science - Distributed, Parallel, and Cluster Computing, parallel and distributed algorithms, multiprocessor architectures, LDPC decoder, Distributed, Parallel, and Cluster Computing (cs.DC), Electrical and Computer Engineering, 620, 004
FOS: Computer and information sciences, GPU processing, Computer Science - Distributed, Parallel, and Cluster Computing, parallel and distributed algorithms, multiprocessor architectures, LDPC decoder, Distributed, Parallel, and Cluster Computing (cs.DC), Electrical and Computer Engineering, 620, 004
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