Design and implementation of an ASIP-based cryptography processor for AES, IDEA, and MD5

Article English OPEN
Karim Shahbazi; Mohammad Eshghi; Reza Faghih Mirzaee;
  • Publisher: Elsevier
  • Journal: Engineering Science and Technology (issn: 2215-0986)
  • Related identifiers: doi: 10.1016/j.jestch.2017.07.002
  • Subject: TA1-2040 | ASIP | IDEA | Crypto Processor | Engineering (General). Civil engineering (General) | AES | MD5

In this paper, a new 32-bit ASIP-based crypto processor for AES, IDEA, and MD5 is designed. The instruction-set consists of both general purpose and specific instructions for the above cryptographic algorithms. The proposed architecture has nine function units and two d... View more
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