Paving the way towards a highly energy-efficient and highly integrated compute node for the Exascale revolution:the ExaNoDe approach
- Publisher: IEEE
Supercomputadors | Unimem | Virtualization | Supercomputers | Program processors | Silicon | Computer architecture | :Enginyeria electrònica [Àrees temàtiques de la UPC] | Exascale | High performance computing | HPC | Computational modeling | Programari--Disseny | Silicon interposer | Power demand | Hardware
Power consumption and high compute density are the key factors to be considered when building a compute node for the upcoming Exascale revolution. Current architectural design and manufacturing technologies are not able to provide the requested level of density and power efficiency to realise an operational Exascale machine. A disruptive change in the hardware design and integration process is needed in order to cope with the requirements of this forthcoming computing target. This paper presents the ExaNoDe H2020 research project aiming to design a highly energy efficient and highly integrated heterogeneous compute node targeting Exascale level computing, mixing low-power processors, heterogeneous co-processors and using advanced hardware integration technologies with the novel UNIMEM Global Address Space memory system.
This work was supported by the ExaNoDe project that has received funding from the European Union’s Horizon 2020 research and innovation programme under grant agreement
No. 671578. The work presented in this paper reflects only authors’ view and the European Commission is not responsible for any use that may be made of the information it contains.
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