publication . Conference object . Article . 2016

Current conveyor macromodels for wideband RF circuit design

Brinson, Mike; Kuznetsov, Vadim;
Open Access
  • Published: 23 Jun 2016
  • Publisher: IEEE
  • Country: United Kingdom
Abstract
A high percentage of analogue integrated circuit designs use voltage domain signal processing techniques. Given the fact that integrated circuit current conveyors are high bandwidth current processing devices, often with superior RF performance compared to comparable voltage domain devices, it is surprising that the number of current mode integrated circuits available, as standard of-the-shelf industrial items, is so small. This paper introduces equation-defined device and Verilog-A synthesis approaches to the macromodelling of current conveyor integrated circuits. To illustrate the proposed modelling techniques the properties of a number of modular behavioural l...
Subjects
ACM Computing Classification System: Hardware_LOGICDESIGNHardware_INTEGRATEDCIRCUITS
free text keywords: Electronic engineering, Equivalent circuit, Physical design, Electrical engineering, business.industry, business, Application-specific integrated circuit, Mixed-signal integrated circuit, Current conveyor, Computer science, Circuit design, Circuit extraction, Discrete circuit, Control engineering, dewey620
Related Organizations
20 references, page 1 of 2

[1] J. A. Connelly and Pyung Choi, “Macromodeling with SPICE”, Prentice Hall, Englewood Clifs, New Jersey 07632, 1992.

[2] G.R. Bole, B.M. Cohn, D.O. Pederson and J.E. Soloman, “Macromodelling of integrated circuit operational amplifiers”, IEEE Journal of Solid-State Circuits, 1974, vol. 9, pp. 352-363.

[3] S. Jahn and M.E. Brinson, “Interactive Compact Modeling Using Qucs Equation-Defined Devices”, Int. J. Numer. Model. 2008, vol 21, pp. 335-349.

[4] M.E. Brinson and S. Jahn, “Qucs: A GPL software package for circuit simulation, compact device modelling and circuit macromodelling from DC to RF and beyond”, Int. J. Numer. Model. 2009, vol 22, pp. 297-319. [OpenAIRE]

[5] Accellera, ”Verilog-AMS Language Reference Manual. Version 2.3.1.“, 2009, Available from http://www.accelera.org, [accessed February 2016].

[6] M.E. Brinson, R. Crozier, V. Kuznetsov, C. Novak, B. Roucaries, F. Schreuder. G.T. Torri, ”Qucs (Quite universal circuit simulator), Available from http://qucs.sourceforge.net/index.html, [accessed February 2016].

[7] A. Sedra and K. C. Smith, “The Current Conveyor: A new circuit building block”, , Aug. 1968, Proc. IEEE, Vol. 576, pp. 1368-1369.

[8] K.C. Smith and A. Sedra, “A second generation current conveyor and its applications”, Feb. 1970, IEEE Trans. Circuit Theory, Vol. CT-17, pp. 132-134.

[9] A. Fabre, “Low power current mode second-order bandpass IF filter”, June 1997, IEEE Trans. Circuits Syst. II, Vol. 44, pp. 436-445.

[10] B. Wilson, F. J. Lidgey and C, Toumazou, “Current mode signal processing circuits”, June 1989, IEEE International Symposium on Circuits abd Systems Proceedings, pp. 2665-2668.

[11] L. Lemaitre, W. Grabinski and C. McAndrew, “Compact device modeling using Verilog-A and ADMS”, Electron Technology Internet Journal, Vol. 35, pp. 1-5, 2003.

[12] L. Lemaitre, G. J. Coram, C. McAndrew and K. Kundert, “Extensions to Verilog-A to support compact device modeling”, IEEE International Behavioral Modeling and Simulation Conference, BMAS-03, pp. 134- 138. October 2003.

[13] V. Kuznetsov, “QEP: Qucs schematic simulation with ngspice”, 2015, https://github.com/Qucs/qucs/wiki/QEP, (also at: https://github.com/ra3xdh/qucs/tree/spice4qucs), [accessed February 2016].

[14] Brinson M, Crozier R, Kuznetsov V, Novak C, Roucaries B, Schreuder F,and Torri GT. ”Qucs: An introduction to the new simulation and compact device modelling features implemented in release 0.0.19/0.0.19Src2 of the popular GPL circuit simulator”. MOSAK ESSDERC/ESSCIRC Workshop, 18 September Graz, 2015. http://www.mos-ak.org/graz−2015/presentations/T−5−Brinson−MOSAK−Graz−2015.pdf, [accessed February 2016]. [OpenAIRE]

[15] C. Toumazou, F.J. Lidgy and D.G. Haigh (Editors), ”Analogue IC design: the current-mode approach”, Peter Peregrinus Ltd. on behalf of the Institution of Electrical Engineers, London, UK, 1998.

20 references, page 1 of 2
Abstract
A high percentage of analogue integrated circuit designs use voltage domain signal processing techniques. Given the fact that integrated circuit current conveyors are high bandwidth current processing devices, often with superior RF performance compared to comparable voltage domain devices, it is surprising that the number of current mode integrated circuits available, as standard of-the-shelf industrial items, is so small. This paper introduces equation-defined device and Verilog-A synthesis approaches to the macromodelling of current conveyor integrated circuits. To illustrate the proposed modelling techniques the properties of a number of modular behavioural l...
Subjects
ACM Computing Classification System: Hardware_LOGICDESIGNHardware_INTEGRATEDCIRCUITS
free text keywords: Electronic engineering, Equivalent circuit, Physical design, Electrical engineering, business.industry, business, Application-specific integrated circuit, Mixed-signal integrated circuit, Current conveyor, Computer science, Circuit design, Circuit extraction, Discrete circuit, Control engineering, dewey620
Related Organizations
20 references, page 1 of 2

[1] J. A. Connelly and Pyung Choi, “Macromodeling with SPICE”, Prentice Hall, Englewood Clifs, New Jersey 07632, 1992.

[2] G.R. Bole, B.M. Cohn, D.O. Pederson and J.E. Soloman, “Macromodelling of integrated circuit operational amplifiers”, IEEE Journal of Solid-State Circuits, 1974, vol. 9, pp. 352-363.

[3] S. Jahn and M.E. Brinson, “Interactive Compact Modeling Using Qucs Equation-Defined Devices”, Int. J. Numer. Model. 2008, vol 21, pp. 335-349.

[4] M.E. Brinson and S. Jahn, “Qucs: A GPL software package for circuit simulation, compact device modelling and circuit macromodelling from DC to RF and beyond”, Int. J. Numer. Model. 2009, vol 22, pp. 297-319. [OpenAIRE]

[5] Accellera, ”Verilog-AMS Language Reference Manual. Version 2.3.1.“, 2009, Available from http://www.accelera.org, [accessed February 2016].

[6] M.E. Brinson, R. Crozier, V. Kuznetsov, C. Novak, B. Roucaries, F. Schreuder. G.T. Torri, ”Qucs (Quite universal circuit simulator), Available from http://qucs.sourceforge.net/index.html, [accessed February 2016].

[7] A. Sedra and K. C. Smith, “The Current Conveyor: A new circuit building block”, , Aug. 1968, Proc. IEEE, Vol. 576, pp. 1368-1369.

[8] K.C. Smith and A. Sedra, “A second generation current conveyor and its applications”, Feb. 1970, IEEE Trans. Circuit Theory, Vol. CT-17, pp. 132-134.

[9] A. Fabre, “Low power current mode second-order bandpass IF filter”, June 1997, IEEE Trans. Circuits Syst. II, Vol. 44, pp. 436-445.

[10] B. Wilson, F. J. Lidgey and C, Toumazou, “Current mode signal processing circuits”, June 1989, IEEE International Symposium on Circuits abd Systems Proceedings, pp. 2665-2668.

[11] L. Lemaitre, W. Grabinski and C. McAndrew, “Compact device modeling using Verilog-A and ADMS”, Electron Technology Internet Journal, Vol. 35, pp. 1-5, 2003.

[12] L. Lemaitre, G. J. Coram, C. McAndrew and K. Kundert, “Extensions to Verilog-A to support compact device modeling”, IEEE International Behavioral Modeling and Simulation Conference, BMAS-03, pp. 134- 138. October 2003.

[13] V. Kuznetsov, “QEP: Qucs schematic simulation with ngspice”, 2015, https://github.com/Qucs/qucs/wiki/QEP, (also at: https://github.com/ra3xdh/qucs/tree/spice4qucs), [accessed February 2016].

[14] Brinson M, Crozier R, Kuznetsov V, Novak C, Roucaries B, Schreuder F,and Torri GT. ”Qucs: An introduction to the new simulation and compact device modelling features implemented in release 0.0.19/0.0.19Src2 of the popular GPL circuit simulator”. MOSAK ESSDERC/ESSCIRC Workshop, 18 September Graz, 2015. http://www.mos-ak.org/graz−2015/presentations/T−5−Brinson−MOSAK−Graz−2015.pdf, [accessed February 2016]. [OpenAIRE]

[15] C. Toumazou, F.J. Lidgy and D.G. Haigh (Editors), ”Analogue IC design: the current-mode approach”, Peter Peregrinus Ltd. on behalf of the Institution of Electrical Engineers, London, UK, 1998.

20 references, page 1 of 2
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