A system for calculating the greatest common denominator implemented using asynchrobatic logic

Part of book or chapter of book English OPEN
Willingham, David J. ; Kale, Izzet

An asynchrobatic system that uses Euclid's algorithm to calculate the greatest common denominator of two numbers is presented. This algorithm is a simple system that contains both repetition and decision, and therefore demonstrates that asynchrobatic logic can be used to implement arbitrarily complex computational systems. Under typical conditions on a 0.35 mum process, a 16-bit implementation can perform a 24-cycle test vector in 2.067 mus with a power consumption of 3.257 nW.
  • References (7)

    Willingham D.J. & Kale I., “Asynchronous, quasi-Adiabatic (Asynchrobatic) Logic for Low-Power very Wide Data Width Applications”, Proc. ISCAS 2004.

    Willingham D.J. & Kale I., “An Asynchrobatic, radix-four, carry look-ahead adder”, Proc. PRIME 2008, pp 105-108.

    Muller D.E. & Bartky W.S., “A theory of asynchronous circuits” Proc. Int. Symp. Theory of Switching, pp. 204-243, 1959.

    Vetuli A., Pascoli S.D. & Reyneri L.M., “Positive Feedback in Adiabatic Logic”, Elec. Lett., 32(20):1867-1869, 26 Sept. 1996.

    Heller L., Griffin W., Davis J. & Thoma, N., “Cascode voltage switch logic: A differential CMOS logic family”, ISSCC Dig. Tech. Papers, 1984, pp. 16-17.

    Euclide, ”Elements”, Book VII, John Daye, London, 1570.

    [10] Sparsø J. & Furber S.B., “Principles of Asynchronous Circuit Design: A Systems Perspective”, Kluwer Academic, 2002, ISBN 0-7923- 7613-7.

  • Similar Research Results (1)
  • Metrics
    0
    views in OpenAIRE
    0
    views in local repository
    18
    downloads in local repository

    The information is available from the following content providers:

    From Number Of Views Number Of Downloads
    WestminsterResearch - IRUS-UK 0 18
Share - Bookmark