Exploiting the bulk-driven approach in CMOS analogue amplifier design
This thesis presents a collection of new novel techniques using the bulk-driven approach,\ud which can lead to performance enhancement in the field of CMOS analogue amplifier design\ud under the very low-supply voltage constraints. In this thesis, three application areas of the\ud bulk-driven approach are focused – at the input-stage of differential pairs, at the source\ud followers, and at the cascode devices.\ud For the input stage of differential pairs, this thesis proposes two new novel circuit design\ud techniques. One of them utilises the concept of the replica-biased scheme in order to solve the\ud non-linearity and latch-up issues, which are the potential problems that come along with the\ud bulk-driven approach. The other proposed circuit design technique utilises the flipped voltage\ud scheme and the Quasi-Floating Gate technique in order to achieve low-power high-speed\ud performances, and furthermore the reversed-biased diode concept to overcome the issue of\ud degraded input impedance characteristics that come along with the bulk-driven approach.\ud Applying the bulk-driven approach in source followers is a new type of circuit blocks in\ud CMOS analogue field, in which to the author’s best knowledge has not been proposed at any\ud literatures in the past. This thesis presents the bulk-driven version of the flipped voltage\ud followers and super source followers, which can lead to eliminating the DC level shift.\ud Furthermore, a technique for programming the DC level shift less than the threshold voltage\ud of a MOSFET, which cannot be achieved by conventional types of source followers, is\ud presented.\ud The effectiveness of the cascode device using the bulk-driven approach is validated by\ud implementing it in a complete schematics design of a fully differential bulk-driven\ud operational transcoductance amplifier (OTA). This proposal leads to solving the lowtranconductance\ud problem of a bulk-driven differential pair, and in effect the open loop gain of\ud the OTA exceeds 60dB using a 0.35?m CMOS technology.\ud The final part of this thesis provides the study result of the input capacitance of a bulk-driven\ud buffer. To verify the use of the BSIM3 MOSFET model in the simulation for predicting the\ud input capacitance, the measurement data of the fabricated device are compared with the postlayout\ud simulation results.