This R&I action will focus on optimally combining traditional roll-to-roll (R2R) compatible fabrication technologies such as printing with unique R2R sputtering, ALD and heterogeneous integration for flexible, thin, large-area electronics applications. It is seen that the different R2R fabrication methods all have their strengths and weaknesses such that using a cost-performance-optimized combination of them for a single production will enable new levels of applicability for TOLAE devices for mass markets. The goal of the ROLL-OUT project is to create a multi-purpose technology for, thin, large-area, high-performance, smart, and autonomous systems comprising of integrated circuits (based on metal-oxide thin-film transistors), sensors, and electronics. They will be utilized in advancing the packaging, automotive interiors and textile industries beyond their traditional scope. The key features are high-performance circuits and components. To fabricate high-performance circuits, the project intends to use novel, hybrid, moderate-temperature, roll-to-roll processes, namely sputtering, Atomic Layer Deposition (ALD) and screen-printing on thin, flexible, large-area substrates. This will enable enormous value addition to the products of European industries without adding any significant extra cost. ROLL-OUT has 5 research organizations (RO) and 5 industrial partners (IND). The action has 6 work-packages (WPs) of which 3 are led by ROs and 3 by INDs. The technology development WPs are led by ROs and demonstration and exploitation WPs are led by INDs. The action intends to create 3 tangible industrial smart, autonomous system demonstrators that will be validated by the industrial partners in accordance with standard testing protocols. The action seeks EU funding of 3.66M€ for a period of 36 months. 356,5 person-months will be dedicated to the work. The consortium consists of partners from 7 EU member states with complimentary expertise essential for the action.

GENESIS, backed by Horizon Europe, aims to make semiconductor manufacturing sustainable, aligning with the European Green Deal, by minimizing environmental impact with eco-friendly innovations. [Objectives] GENESIS aims to replace harmful materials with safer options, improve waste management, and enhance the use and recyclability of scarce materials. [Innovations] GENESIS introduces innovations in three key areas: • Innovative materials: PFAS-free polymer and eco-friendly gas alternatives complying with EU regulations. • Waste & emissions monitoring: Cutting-edge sensors detect hazardous substances for efficient aqueous and gas waste elimination, reducing environmental and health risks. • Scarce material management: New integration technologies optimize material usage and initiate recycling of scarce materials like Gallium, Niobium, and silicon carbide. [Methodology] GENESIS employs four technical work packages to research sustainable material substitution, emission reduction, and resource management. This modular approach promotes scalability and integration with existing processes, fostering a circular economy in the semiconductor sector. Supervised by management work packages, it quantifies environmental efficiency and engages in dissemination to promote European technological achievements [Outcomes] The project targets a 50% cut in hazardous materials, 30% decrease in emissions and waste, and improved scarce material recyclability, boosting EU semiconductor sustainability and global competitiveness. [Impact] GENESIS supports EU's tech sovereignty and resilience through accurate monitoring and sustainable practices. It positions Europe as a leader in sustainable semiconductor tech, setting new standards for impact-oriented communication and dissemination.

The rise of quantum technology has opened the eyes of the ICT industry with respect to cryogenics. It is considered an enabler bringing in quantum functionalities and enhanced system performance and we are observing a massive growth of cryogenics from coolers to cryogenic electronics and photonics. ArCTIC is a joint effort of top European RTOs, industrial fabrication facilities, and leading application partners (23 industrial among which 14 SMEs, 7 RTO, 6 academic), sharing the vision to take a joint EU step towards the era of cryogenic classical and quantum microsystems. We aim to close the gap between qubit research and interfacing control machinery, highly needed for scaled-up quantum systems. The main goal of ArCTIC is to develop scalable cryogenic ICT microsystems and control technology for quantum processors. The technologies developed will have applications in many fields from sensing to communication, leading to important cross-fertilization that will strengthen the forming European ecosystem on cryogenic classical and quantum microsystems. ArCTIC will advance semiconductor technologies and materials, and tailor these for QT requirements and cryogenic applications. Multi-scale physics and data-driven models, cryogenic PDK modelling, device characterization, circuit design activities will support the development of cryogenic microelectronics. We will develop quantum processor platforms and broaden the applicability of microelectronic devices and circuits for cryogenic operation by developing cryo-compatible ultra-low loss substrates and thin-films, microelectronic and photonic circuits, semiconductor packaging and heterogeneous-integration techniques and benchmark the developed technologies. Scientific and Industrial ArCTIC-demonstrators and applications are driving our developments enabling the European industry to maintain and expand its leading edge in semiconductor components and processes and QT and strengthen sustainable manufacturing technologies

R2POWER300 is committed to challenge the following Objectives: • Development and manufacturing of a multi-KET Pilot Line (i.e. Nanoelectronics, Nanotechnology, Advanced Manufacturing) • Energy Efficiency and CO2 Reduction megatrends. The project aims to achieve the following Goals: 1. Set the stage for the future extension to 300mm of the R2 Fab facility located in Agrate Brianza (Italy) - i.e. line’s specification, tools’ evaluation and screening, new process’s optimization and characterization, etc. 2. To evaluate, characterize and optimize the equipments and process necessary to achieve the new BCD10 technology, featuring 90nm lithography, at 300mm wafer size. BCD (i.e. Bipolar + CMOS + DMOS) is a unique smart power technology invented by ST in the mid ‘80s (CMOS’s gate length was 4 m at that time!). As of today BCD is one of the key technology assets of ST and the indefatigable evolution and challenging roadmap makes ST a world-class leader on smart power ICs. 3. Advanced System in Packages: some SiP activity will be performed, with specific reference to Sintering based die-attach, thermal analysis and dedicated packaging solution for high density ALD capacitors.