International audience; A physics-based device simulation was used to study the charge carrier distribution and the electric field configuration inside simplified two-dimensional models for pixel layouts based on the ATLAS pixel sensor. In order to study the behavior of...

Comment: 35 pages, 21 figures, 8 tables

International audience; The FE-I4 chip for the B-layer upgrade is designed in a 130 nm CMOS process. For this design, configuration memories are based on the DICE latches where layout considerations are followed to improve the tolerance to SEU. Tests have shown that DIC...

Lepton colliders are considered as options to complement and to extend the physics programme at the Large Hadron Collider. The Compact Linear Collider (CLIC) is an $e^+e^-$ collider under development aiming at centre-of-mass energies of up to 3 TeV. For experiments at C...

The response of n+p silicon strip sensors to electrons from a 90Sr source was measured using a multi-channel read-out system with 25 ns sampling time. The measurements were performed over a period of several weeks, during which the operating conditions were varied. The ...

info:eu-repo/semantics/published

On behalf of the CALICE Collaboration

Calorimeters with a high granularity are a fundamental requirement of the Particle Flow paradigm. This paper focuses on the prototype of a hadron calorimeter with analog readout, consisting of thirty-eight scintillator layers alternating with steel absorber planes. The ...

International audience; The FE-I4 is a new pixel readout integrated circuit designed to meet the requirements of ATLAS experiment upgrades. The first samples of the FE-I4 engineering run (called FE-I4A) delivered promising results in terms of the requested performances....

The high luminosity upgrade of the Large Hadron Collider, foreseen for 2026, necessitates the replacement of the CMS experiment’s silicon tracker. The innermost layer of the new pixel detector will be exposed to severe radiation, corresponding to a 1 MeV neutron equival...