This article describes an independent, self-arbitrating asynchronous two-to-one multiplexor called Conflux. Conflux can be used to implement clockless and tokenless time-division multiplexing between two sources. This capability can then be used to create a clockless an...

A complete methodology for distributed co-design and co-analysis of Die Re-distribution layer with the package is developed and presented. A test chip is designed in a generic 65nm process with six metal layers out of which 3 layers of RDL have been exported to a Packag...

The paper deals with theoretical and practical prerequisites for the systems-on-chip design intended for measurement, processing and output of different kinds of heterogeneous signals. Some problems concerning the basic structure and architecture of these heterogeneous ...

Statistical analysis based on layout-aware scan diagnosis has been successfully used for identifying defect root causes and reducing physical failure analysis (PFA) efforts, especially for interconnect defects. With increasing complexity and density of designs manufactu...

This paper presents a 1/4-rate PAM4 receiver employing a sampling decoder with an adaptive variable-gain rectifier (AVGR) to achieve a bit efficiency of 1.38 pJ/bit. By concurrently performing gain adaptation and amplitude rectification for decoding the least significan...

Code-based cryptography based on binary Goppa codes is a promising solution for thwarting attacks based on quantum computers. The McEliece cryptosystem is a code-based public-key cryptosystem which is believed to be resistant against quantum attacks. In fact, it is succ...

Validation and debug challenges of system-on-chips (SoCs) are getting increasingly difficult. As we reach the limits of Dennard scaling, efforts to improve system performance and energy efficiency have resulted in the integration of a wide variety of complex hardware ac...

Among the different existing cryptographic file systems, EncFS has a unique feature that makes it attractive for backup setups involving untrusted (cloud) storage. It is a file-based overlay file system in normal operation (i.e., it maintains a directory hierarchy by st...

Based on three groups of different offset voltages, a bandgap reference (BGR) and power-ON reset (POR) hybrid circuit is implemented in 65-nm CMOS. The BGR using amplifier offset voltage and current matching, and the POR using offset voltage comparison and loop settling...

In this paper, the Watermarking and Fingerprinting techniques of Intellectual property protection (IPP) is presented. The Watermarking technique which is based on signature embedding strategy and signature hosting strategy is analysed.

Nonvolatile random access memory (NVRAM) is becoming a popular alternative as the memory and storage medium in battery-powered embedded systems because of its fast read/write performance, byte-addressability, and nonvolatility. A well-known example is phase-change memor...

Design optimization, verification, and failure diagnosis of analog and mixed-signal (AMS) circuits requires accurate models that can reliably capture complex dependencies of circuit performances on essential circuit and process parameters. We present a novel Bayesian le...

The miraculous powers of modern day calculations rests on three important discoveries namely Arabic notation, decimal fractions and logarithm. The concept of logarithm has been used for more than three hundred years and it has simplified lot of calculations but in today...

NVIDIA A100 Tensor Core GPU is NVIDIA's latest flagship GPU. It has been designed with many new innovative features to provide performance and capabilities for HPC, AI, and data analytics workloads. Feature enhancements include a Third-Generation Tensor Core, new asynch...

Authenticated encryption algorithms offer privacy, authentication, and data integrity, as well. In recent years, they have received special attention after the call for submissions of Competition for Authenticated Encryption: Security, Applicability, and Robustness (CAE...

In this paper, conditional push pull pulsed latch (CPPPL) is designed using Tanner tool. This latch is compared with other existing flip-flops. Total 12 flip-flops are compared with CPPPL which belong to different logic styles. Comparison is done through various paramet...

Using storage class memories (SCMs) as nonvolatile cache of NAND flash memory is a promising solution for the high-performance storage. However, the problem is the high SCM cost per bit which is about ten times higher than NAND flash and the optimal SCM capacity is appl...

NAND Flash is not bit-alterable in the erase operation, and the erase is often carried out in a very large block size. This deteriorates the overall system performances. In this work, we propose a novel bit-alterable 3D NAND Flash that can overcome the drawback of large...

IEEE Transactions on Computers, 70 (2)

Host-Aware/Drive-Managed Shingled Magnetic Recording (SMR) drives can accept non-sequential writes using a buffer called media cache. Data in the media cache will be migrated to its designated location by a cleaning process if the buffer is full (blocking cleaning) or t...

This article, the second in a multipart series, discusses Apple’s complaint against Qualcomm—namely, that Qualcomm breached its contract to pay Apple a billion dollars in rebates, and engaged in anticompetitive practices injuring Apple.

In order to improve the capacity of production system, a maintenance decision method based on Semi-Markov Model was provided. Firstly the model for the production system was described. Then, the state probability and universal generating function were combined to analyz...

A diagnostic test generation procedure targets fault pairs in a set of target faults with the goal of distinguishing all the fault pairs. When a fault pair cannot be distinguished, it prevents the diagnostic test set from providing information about the faults, and cons...

Deliberate injection of faults into cryptographic devices is an effective cryptanalysis technique against symmetric and asymmetric encryption algorithms. In this paper we describe concurrent error detection (CED) approach against such attacks in substitution-permutation...

Modern deep neural networks (DNNs) require billions of multiply-accumulate operations per inference. Given that these computations demand relatively low precision, it is feasible to consider analog computing, which can be more efficient than digital in the low-SNR regim...

First-in–first-out (FIFO) line buffers occupy considerable logic gates and consume significant power of the feature from accelerated segment test (FAST) image corner detection engine. In this study, a FAST-Chip (FAST-C) engine is proposed to eliminate these drawbacks. I...

It is important to screen scan-path failures because scan-path failures affect product yield even though these are not related to the device functional operations. However, the additional efforts such as diagnosis are required to screen scan-path failures. In this paper...

Reachability analysis aims at identifying states reachable by a system within a given time horizon. This task is known to be computationally expensive for linear hybrid systems. Reachability analysis works by iteratively applying continuous and discrete post operators t...

Rapid device aging in the nano era threatens system lifetime reliability, posing a major intrinsic threat to system functionality. Traditional techniques to overcome the aging-induced device slowdown, such as guardbanding are static and incur performance, power, and are...

Speech recognition is expected to be widely used in many IoT applications such as smart home and wearable devices. For successful speech recognition, the integrity of voice signals is critical. However, during transmission or storage of voice signals, there are usually ...

International audience; Control-flow checking (CFC) is one of the main approaches to monitor the behavior of a microprocessor-based system without specific assumptions on error models (e.g., single bit flips). Many approaches have been proposed and evaluated, but none t...

By realizing the concept of implementation of the radio propagation channels on simulators is the eminent intention of this work. Even though prototyping software simulators are effortless to design we prefer hardware simulators as they endeavors distinguishable quickne...

Quasi-cyclic low-density parity-check (QC-LDPC) codes have been adopted by the Consultative Committee for Space Data Systems (CCSDS) as the recommended standard for onboard channel coding in Near-Earth and Deep-Space communications. Encoder architectures proposed so far...

A key enabler for the ever-increasing adoption of FPGA accelerators is the availability of frameworks allowing for the seamless coupling to general-purpose host processors. Embedded FPGA+CPU systems still heavily rely on copy-based host-to-accelerator communication, whi...

Phase-change random access memory with an ovonic threshold switch (OTS-PRAM) has become increasingly popular as an alternative to resolve the problem caused by the small capacity of dynamic random access memory and the high latency of NAND flash memory in computing syst...

Under broadcast scan, scan chains are partitioned into groups that receive the same scan-in values. This article considers, for the first time, the application of functional broadside tests under broadcast scan. This article provides a definition of a close-to-functiona...

This paper describes how two Design-For-Test (DFT) techniques (hierarchical methodology and Embedded Deterministic Test (EDT) channel sharing) were combined on an industrial design to reduce test cost factors such as ATPG runtime, ATPG memory footprint, and manufacturin...

In the wake of the soft-error problem, fault injection (FI) is a standard methodology to measure fault resilience of programs and to compare algorithm variants. As detailed, e.g. gate-level machine models are often unavailable or too slow to simulate, FI is usually carr...

This paper presents the design and testing of a self-biased current source. The design described in this paper is based on the concept of inversion coefficient, which allows a direct calculation of the dispersion in the output current in terms of the internal bias error...

Security-critical applications on integrated circuits (ICs) are threatened by probing attacks that extract sensitive information assisted with focused ion beam (FIB)-based circuit edit. Existing countermeasures, such as active shield, analog shield, and $t$ -private cir...

When performing addition or subtraction in the floating point format, the sticky bit is used in some rounding modes. To generate the sticky bit, the multiple-input OR gate is required. If addition or subtraction is implemented in FPGA, the sticky bit generation can slow...